what is package ?

- Aug 09, 2016-

   After a long process, from design to manufacture, and finally get a IC chip. However, a chip is very small and thin, if not applied to protect the outside, will be easily scratched damage. In addition, because the chip size is small, if you do not have a larger size of the shell, will not be easy to manually placed in the circuit board. Therefore, this article is to describe the package to be described in the following.

  At present, there are two common packing, a is electric toys in common, black looks like a centipede dip package, another is common to buy boxed CPU BGA package. As for other packaging methods, there are early CPU use PGA (Grid Array Pin; Grid Array Pin) or DIP modified version of QFP (plastic quad flat package), etc.. Because there are too many kinds of packaging, the following will be introduced to DIP and BGA package.

   Traditional packaging, long lasting

First to introduce the double vertical dual inline package (DIP) package, from the figure can see the IC chip of the package in the double foot, looks like a black centipede, impressive, the encapsulation method is the earliest use of the IC packaging technology, has the advantages of low cost, suitable for small and do not need too many lines of the chip. However, because most of the plastic is used, the heat dissipation effect is poor, can not meet the requirements of the current high-speed chip. Therefore, using this package, mostly the enduring chip, such as in the figure below OP741, or is on operation speed less requirements and a smaller chip, IC chip fewer holes.

As for the ball grid array (Grid Array Ball, BGA) package, and DIP compared to the smaller package size, can be easily put into a smaller size of the device. In addition, because the pin position in the lower chip, and DIP, can accommodate more metal pin

   A chip that is quite suitable for more contacts. However, the cost of this method is high and the connection method is more complex, so it is mostly used in high cost products.

However, using these packaging methods, it will consume a considerable volume. Like the current mobile device, wearable devices, and need a variety of elements, if each component are independent package, together will cost very large space, so there are two kinds of methods, which can meet the requirement of reducing the volume, respectively SOC (system on chip) and SIP (system in packet).

    In the rise of smart phones, in the major financial magazine can be found in the SoC, but what is SoC? In simple terms, is the original function of the IC, integrated in a chip. With this method, not only can reduce the volume, but also can reduce the distance between different IC, improve the speed of the chip. As the production methods is in IC design phase, each IC put together, again through the previously introduced design process, made into a mask.

However, SoC is not only the advantages, to design a SoC needs a lot of technical cooperation. IC chips each package, the package has external protection, and the distance between IC and IC is far away, the situation does not occur interactive interference. But when all IC are packaged together, it's the beginning of a nightmare. IC design from the original design of the original IC, into the understanding and integration of the various functions of the IC, increasing the workload of the engineer. In addition, it will encounter a lot of situation, such as the high frequency signals of the communication chip may affect other features such as IC.


   In addition, SoC also need to get other manufacturers IP (property intellectual) authorization, in order to be able to design a good component to the SoC. Because making SOC need access to the whole planet IC design details, in order to make complete photomask, which also increases the cost of SoC design. Maybe some people question why not design a good? Because of the design of various IC needs a lot and the IC related knowledge, only like apple so many gold enterprise, budget from the well-known enterprises poaching top engineers. In order to design a new IC, through authorized cooperation or than its own research and development of more cost-effective.

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